| NAND Flash Library | ||
|---|---|---|
| Prev | Chapter 1. NAND Flash CDL configuration | |
Global information about the NAND flash on a board is spread over two places:
the target description in the global ecos.db and the CDL
file for the flash on the target board. The ecos.db target
must specify the package name CYGPKG_IO_FLASH_NAND, a
package CYGPKG_DEVS_FLASH_NFC_manuf_type
to specify the controller, and, for a custom chip type, a package
CYGPKG_DEVS_FLASH_CHIP_manuf_type to specify the
chip(s). The CDL file for the flash on the target board must specify the
number of ANC devices, the number of NAND Flash controllers for each ANC,
and the number of NAND Flash Chips for each NAND Flash controller. For each
device, it must specify the relevant device numbers.
A component in the CDL file for the target flash that describes a controller
must specify the device that is used, by implementing the
CYGHWR_DEVS_FLASH_NAND_CONTROLLER_manuf_type option.
A comparable requirement holds for custom chips. Components for ONFI or regular
chips will implement CYGHWR_IO_FLASH_NAND_CHIP.
A fairly complete example for a target that has one ANC, one controller and one regular chip:
cdl_package CYGPKG_DEVS_FLASH_ARCH_BOARD_NAND {
parent CYGPKG_IO_FLASH_NAND
active_if CYGPKG_IO_FLASH_NAND
active_if CYGPKG_HAL_ARCH_BOARD
include_dir pkgconf
cdl_component CYGCMP_DEVS_FLASH_NAND_0 {
display "NAND flash Abstract NAND Chip 0 on an ARCH Board"
implements CYGHWR_DEVS_FLASH_NAND_ANC
description "
Abstract NAND Chip device 0."
cdl_option CYGDAT_IO_FLASH_NAND_ANC_0_NUM_CONTROLLERS {
display "Number of NAND controllers for ANC 0"
define_proc {
puts $::cdl_system_header "#define CYGDAT_IO_FLASH_NAND_ANC_0_NUM_CONTROLLERS 1"
}
flavor data
default_value 1
}
cdl_option CYGDAT_IO_FLASH_NAND_ANC_0 {
display "Enable device driver for Abstract NAND Chip device 0"
define_proc {
puts $::cdl_system_header "#define CYGDAT_IO_FLASH_NAND_BLOCK_DEVNO_0 0"
}
flavor data
default_value 1
}
cdl_component CYGCMP_DEVS_FLASH_NAND_ANC_0_CONTROLLER_0 {
display "NAND flash controller 0 on an ARCH Board"
requires CYGPKG_DEVS_FLASH_NFC_manuf_type
define_proc {
puts $::cdl_system_header "#define CYG_DEVS_FLASH_ARCH_NFC_PLATFORM_INC pkgconf/nand_arch_board.inc"
}
flavor bool
default_value 1
cdl_option CYGDAT_IO_FLASH_NAND_CTL_ARCH_NFC_NUM_CHIPS_0 {
display "Number of NAND chips for controller 0"
define_proc {
puts $::cdl_system_header "#define CYGDAT_IO_FLASH_NAND_CTL_ARCH_NFC_NUM_CHIPS_0 1"
puts $::cdl_system_header "#define CYGDAT_IO_FLASH_NAND_CTL_ARCH_NFC_DEVNO 0"
puts $::cdl_system_header "#define CYGDAT_IO_FLASH_NAND_CTL_ARCH_NFC_ANC 0"
}
flavor data
default_value 1
}
cdl_component CYGCMP_DEVS_FLASH_NAND_ANC_0_CTL_0_CHIP_0 {
display "NAND flash chip 0 on controller 0"
implements CYGHWR_IO_FLASH_NAND_CHIP
flavor data
default_value 1
cdl_option CYGDAT_FLASH_NAND_CHIP_DEVICE_0 {
display "Enable device driver for NAND chip 0 (global count)"
define_proc {
puts $::cdl_system_header "#define CYGDAT_NAND_CHIP_0_DEVNO 0"
puts $::cdl_system_header "#define CYGDAT_NAND_CHIP_0_CONTROLLER 0"
puts $::cdl_system_header "#define CYGDAT_NAND_CHIP_0_ANC 0"
puts $::cdl_system_header "#define CYGDAT_NAND_CHIP_0_TYPE CYG_NAND_CHIP_TYPE_REGULAR"
}
flavor bool
default_value 1
}
}
}
}
} |